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Q9. The p.d. across the base-emitter junction of the silicon transistor shown in Fig Q3 is 0.6 V and the steady state voltage at the collector is 4 V.

Calculate EACH of the following, assuming the base current is negligible:

(a) The p.d across each of the bias resistors;

(b) The p.d between the collector and emitter of the transistor;

(c) The value of the load resistor RL;

(d) The power dissipated in RL;

(e) The power dissipated in the transistor.